
Chapter 2 Specification of Communication port for CPU module
2 – 11
Details of the status register, the control register, the transmitting counter, and the receiving counter are described
below.
Status registe
Control registe
Transmitting counte
Receiving counte
+00
+01
+02
+03
b0 b7b8
b15
[1] [2] [3] [4]
[A] [B]
[5]
Figure 2.8 Status register, Control register, Transmitting counter, and Receiving counter
[ Status register ]
[1] ASR port status flag 1: Under open, 0: Under close
[2] Event transmitting completion flag 1: Transmitting completion
[3] Receiving completion flag 1: Receiving completion
[4] Error flag 1: Error occurrence
[5] Error code 0x01: Event transmitting request flag [B] is turned ON while ASR
port status flag [A] is closed.
0x02: Event transmitting request flag is turned ON again in status
which the transmitting of message is not completed.
[ Control register ]
[A] ASR port open request flag 1: Open request, 0: Close request
[B] Event transmitting request flag 1: Transmitting start
[ Transmitting counter ]
Stores the number of transmitting of message data.
[ Receiving counter ]
Stores the number of receiving of message data.
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